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BMCBI
2011
12 years 11 months ago
Protein alignment algorithms with an efficient backtracking routine on multiple GPUs
Background: Pairwise sequence alignment methods are widely used in biological research. The increasing number of sequences is perceived as one of the upcoming challenges for seque...
Jacek Blazewicz, Wojciech Frohmberg, Michal Kierzy...
NOCS
2010
IEEE
13 years 5 months ago
Addressing Manufacturing Challenges with Cost-Efficient Fault Tolerant Routing
Abstract--The high-performance computing domain is enriching with the inclusion of Networks-on-chip (NoCs) as a key component of many-core (CMPs or MPSoCs) architectures. NoCs face...
Samuel Rodrigo, Jose Flich, Antoni Roca, Simone Me...
DSD
2003
IEEE
138views Hardware» more  DSD 2003»
14 years 28 days ago
A Two-step Genetic Algorithm for Mapping Task Graphs to a Network on Chip Architecture
Network on Chip (NoC) is a new paradigm for designing core based System on Chip which supports high degree of reusability and is scalable. In this paper we describe an efficient t...
Tang Lei, Shashi Kumar
VISUALIZATION
1998
IEEE
13 years 12 months ago
Large scale terrain visualization using the restricted quadtree triangulation
Real-time rendering of triangulated surfaces has attracted growing interest in the last few years. However, interactive visualization of very large scale grid digital elevation mo...
Renato Pajarola
TON
2010
139views more  TON 2010»
13 years 2 months ago
Opportunistic and Cooperative Spatial Multiplexing in MIMO Ad Hoc Networks
With the fast progress of MIMO technology and its growing applications in networks, it is important to develop techniques to enable more efficient MIMO network communications. Howe...
Shan Chu, Xin Wang