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ICS
2009
Tsinghua U.
14 years 2 months ago
High-performance CUDA kernel execution on FPGAs
In this work, we propose a new FPGA design flow that combines the CUDA programming model from Nvidia with the state of the art high-level synthesis tool AutoPilot from AutoESL, to...
Alexandros Papakonstantinou, Karthik Gururaj, John...
ECBS
1999
IEEE
171views Hardware» more  ECBS 1999»
14 years 12 hour ago
Metamodeling - Rapid Design and Evolution of Domain-Specific Modeling Environments
Model integrated computing (MIC) is gaining increased attention as an effective and efficient method for developing, maintaining, and evolving large-scale, domain-specific softwar...
Greg Nordstrom, Janos Sztipanovits, Gabor Karsai, ...
FCCM
2007
IEEE
108views VLSI» more  FCCM 2007»
14 years 2 months ago
Configurable Transactional Memory
Programming efficiency of heterogeneous concurrent systems is limited by the use of lock-based synchronization mechanisms. Transactional memories can greatly improve the programmi...
Christoforos Kachris, Chidamber Kulkarni
ICCAD
2004
IEEE
155views Hardware» more  ICCAD 2004»
14 years 4 months ago
Robust analog/RF circuit design with projection-based posynomial modeling
In this paper we propose a RObust Analog Design tool (ROAD) for post-tuning analog/RF circuits. Starting from an initial design derived from hand analysis or analog circuit synthe...
Xin Li, Padmini Gopalakrishnan, Yang Xu, Lawrence ...
BROADNETS
2005
IEEE
14 years 1 months ago
Performance analysis and enhancement for backbone based wireless mobile ad hoc networks
—In this paper, we present an extended Mobile Backbone Network (MBN) topology synthesis algorithm (ETSA) for constructing and maintaining a dynamic backbone structure in mobile w...
Laura Huei-jiun Ju, Izhak Rubin