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» Efficient symbolic multi-objective design space exploration
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ICCD
1999
IEEE
122views Hardware» more  ICCD 1999»
14 years 1 months ago
Design and Evaluation of a Selective Compressed Memory System
This research explores any potential for an on-chip cache compression which can reduce not only cache miss ratio but also miss penalty, if main memory is also managed in compresse...
Jang-Soo Lee, Won-Kee Hong, Shin-Dug Kim
CODES
2006
IEEE
14 years 3 months ago
System-level power-performance trade-offs in bus matrix communication architecture synthesis
System-on-chip communication architectures have a significant impact on the performance and power consumption of modern multiprocessor system-on-chips (MPSoCs). However, customiza...
Sudeep Pasricha, Young-Hwan Park, Fadi J. Kurdahi,...
SBCCI
2003
ACM
135views VLSI» more  SBCCI 2003»
14 years 2 months ago
Modeling a Reconfigurable System for Computing the FFT in Place via Rewriting-Logic
The growing adoption of reconfigurable architectures opens new implementation alternatives and creates new design challenges. In the case of dynamically reconfigurable architectur...
Mauricio Ayala-Rincón, Rodrigo B. Nogueira,...
ICCD
2005
IEEE
176views Hardware» more  ICCD 2005»
14 years 6 months ago
A Formal Framework for Modeling and Analysis of System-Level Dynamic Power Management
Recent advances in Dynamic Power Management (DPM) techniques have resulted in designs that support a rich set of power management options, both at the hardware and software levels...
Shrirang M. Yardi, Karthik Channakeshava, Michael ...
TOG
2002
170views more  TOG 2002»
13 years 8 months ago
Cut-and-paste editing of multiresolution surfaces
Cutting and pasting to combine different elements into a common structure are widely used operations that have been successfully adapted to many media types. Surface design could ...
Henning Biermann, Ioana M. Martin, Fausto Bernardi...