This research explores any potential for an on-chip cache compression which can reduce not only cache miss ratio but also miss penalty, if main memory is also managed in compresse...
System-on-chip communication architectures have a significant impact on the performance and power consumption of modern multiprocessor system-on-chips (MPSoCs). However, customiza...
Sudeep Pasricha, Young-Hwan Park, Fadi J. Kurdahi,...
The growing adoption of reconfigurable architectures opens new implementation alternatives and creates new design challenges. In the case of dynamically reconfigurable architectur...
Recent advances in Dynamic Power Management (DPM) techniques have resulted in designs that support a rich set of power management options, both at the hardware and software levels...
Shrirang M. Yardi, Karthik Channakeshava, Michael ...
Cutting and pasting to combine different elements into a common structure are widely used operations that have been successfully adapted to many media types. Surface design could ...
Henning Biermann, Ioana M. Martin, Fausto Bernardi...