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» Efficient worst case timing analysis of data caching
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RTAS
2008
IEEE
14 years 2 months ago
Using Trace Scratchpads to Reduce Execution Times in Predictable Real-Time Architectures
Instruction scratchpads have been previously suggested as a way to reduce the worst case execution time (WCET) of hard real-time programs without introducing the analysis issues p...
Jack Whitham, Neil C. Audsley
CHARME
2003
Springer
110views Hardware» more  CHARME 2003»
13 years 11 months ago
Exact and Efficient Verification of Parameterized Cache Coherence Protocols
Abstract. We propose new, tractably (in some cases provably) efficient algorithmic methods for exact (sound and complete) parameterized reasoning about cache coherence protocols. F...
E. Allen Emerson, Vineet Kahlon
CASES
2008
ACM
13 years 9 months ago
Efficient code caching to improve performance and energy consumption for java applications
Java applications rely on Just-In-Time (JIT) compilers or adaptive compilers to generate and optimize binary code at runtime to boost performance. In conventional Java Virtual Mac...
Yu Sun, Wei Zhang
RTCSA
1999
IEEE
13 years 12 months ago
Pipeline Timing Analysis Using a Trace-Driven Simulator
In this paper we present a technique for Worst-Case Execution Time WCET analysis for pipelined processors. Our technique uses a standard simulator instead of special-purpose pipel...
Jakob Engblom, Andreas Ermedahl
IPCCC
1999
IEEE
13 years 12 months ago
Management policies for non-volatile write caches
Many computer hardware and software architectures buffer data in memory to improve system performance. Volatile disk or file caches are sometimes used to delay the propagation of ...
Theodore R. Haining, Darrell D. E. Long