555 search results - page 57 / 111 » Efficiently Implementing Episodic Memory |
ICDE
1996
IEEE
14 years 10 months ago
1996
IEEE
Three pointer-based parallel join algorithms are presented and analyzed for environments in which secondary storage is made transparent to the programmer through memory mapping. B...
DATE
2002
IEEE
14 years 1 months ago
2002
IEEE
: A new technique is presented in this paper to improve the efficiency of data scheduling for multi-context reconfigurable architectures targeting multimedia and DSP applications. ...
ISCA
1998
IEEE
14 years 29 days ago
1998
IEEE
Alewife is a multiprocessor architecture that supports up to 512 processing nodes connected over a scalable and cost-effective mesh network at a constant cost per node. The MIT Al...
ITC
1996
IEEE
14 years 26 days ago
1996
IEEE
Abstract. In complex systems, embedded processors may be used to run software routines for test pattern generation and response evaluation. For system components which are not comp...
APCSAC
2001
IEEE
14 years 11 days ago
2001
IEEE
In this paper, a new architecture called the extendable instruction set computer (EISC) is introduced that addresses the issues of memory size and performance in embedded micropro...