116 search results - page 17 / 24 » Electromigration-Aware Physical Design of Integrated Circuit... |
VLSID
2007
IEEE
14 years 10 months ago
2007
IEEE
Title of thesis: EFFICIENT AND ACCURATE STATISTICAL TIMING ANALYSIS FOR NON-LINEAR NON-GAUSSIAN VARIABILITY WITH INCREMENTAL ATTRIBUTES Ashish Dobhal, Master of Science, 2006 Thes...
ISQED
2005
IEEE
14 years 3 months ago
2005
IEEE
Hierarchical approach greatly facilitates large-scale chip design by hiding distracting details in low-level objects. However, the lowlevel designs have to have a global view of h...
ISCAS
2005
IEEE
14 years 3 months ago
2005
IEEE
— The 3-D channel routing is a fundamental problem on the physical design of 3-D integrated circuits. The 3-D channel is a 3-D grid G and the terminals are vertices of G located ...
ICCD
2003
IEEE
14 years 6 months ago
2003
IEEE
With the circuit density available in today’s ASIC design systems, increased integration is possible creating more complexity in the design of a System on a Chip (SoC). IBM’s ...
DAC
2005
ACM
13 years 11 months ago
2005
ACM
This paper presents a novel placement algorithm for timing optimization based on a new and powerful concept, which we term differential timing analysis. Recognizing that accurate ...