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» Electronic circuit reliability modeling
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DAC
2010
ACM
14 years 1 months ago
TSV stress aware timing analysis with applications to 3D-IC layout optimization
As the geometry shrinking faces severe limitations, 3D wafer stacking with through silicon via (TSV) has gained interest for future SOC integration. Since TSV fill material and s...
Jae-Seok Yang, Krit Athikulwongse, Young-Joon Lee,...
ECAL
1995
Springer
14 years 1 months ago
Contemporary Evolution Strategies
After an outline of the history of evolutionary algorithms, a new ( ) variant of the evolution strategies is introduced formally. Though not comprising all degrees of freedom, it i...
Hans-Paul Schwefel, Günter Rudolph
CP
2008
Springer
13 years 11 months ago
Search Strategies for Rectangle Packing
Rectangle (square) packing problems involve packing all squares with sizes 1 × 1 to n × n into the minimum area enclosing rectangle (respectively, square). Rectangle packing is a...
Helmut Simonis, Barry O'Sullivan
TCOM
2010
106views more  TCOM 2010»
13 years 8 months ago
On the system level prediction of joint time frequency spreading systems with carrier phase noise
- Phase noise is a topic of theoretical and practical interest in electronic circuits. Although progress has been made in the characterization of its description, there are still c...
Youssef Nasser, Mathieu Des Noes, Laurent Ros, Gen...
SIGECOM
2008
ACM
151views ECommerce» more  SIGECOM 2008»
13 years 9 months ago
Security and insurance management in networks with heterogeneous agents
Computer users express a strong desire to prevent attacks and to reduce the losses from computer and information security breaches. However, security compromises are common and wi...
Jens Grossklags, Nicolas Christin, John Chuang