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» Elementary Sets of Logic Programs
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DAC
2009
ACM
14 years 2 months ago
Clock skew optimization via wiresizing for timing sign-off covering all process corners
Manufacturing process variability impacts the performance of synchronous logic circuits by means of its effect on both clock network and functional block delays. Typically, varia...
Sari Onaissi, Khaled R. Heloue, Farid N. Najm
ERSHOV
2009
Springer
14 years 1 months ago
Towards a Scalable, Pragmatic Knowledge Representation Language for the Web
Abstract. A basic cornerstone of the Semantic Web are formal languages for describing resources in a clear and unambiguous way. Logical underpinnings facilitate automated reasoning...
Florian Fischer, Gulay Ünel, Barry Bishop, Di...
CASES
2004
ACM
14 years 25 days ago
Balancing design options with Sherpa
Application specific processors offer the potential of rapidly designed logic specifically constructed to meet the performance and area demands of the task at hand. Recently, t...
Timothy Sherwood, Mark Oskin, Brad Calder
CODES
2003
IEEE
14 years 21 days ago
Design space exploration of a hardware-software co-designed GF(2m) galois field processor for forward error correction and crypt
This paper describes a hardware-software co-design approach for flexible programmable Galois Field Processing for applications which require operations over GF(2m ), such as RS an...
Wei Ming Lim, Mohammed Benaissa
SC
2003
ACM
14 years 19 days ago
Fast Parallel Non-Contiguous File Access
Many applications of parallel I/O perform non-contiguous file accesses: instead of accessing a single (large) block of data in a file, a number of (smaller) blocks of data scatt...
Joachim Worringen, Jesper Larsson Träff, Hube...