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WCRE
2002
IEEE
14 years 2 months ago
Register Liveness Analysis for Optimizing Dynamic Binary Translation
Dynamic binary translators compile machine code from a source architecture to a target architecture at run time. Due to the hard time constraints of just-in-time compilation only ...
Mark Probst, Andreas Krall, Bernhard Scholz
FTDCS
2004
IEEE
14 years 1 months ago
The vMatrix: Server Switching
Today most Internet services are pre-assigned to servers statically, hence preventing us from doing real-time sharing of a pool of servers across as group of services with dynamic...
Amr Awadallah, Mendel Rosenblum
MICRO
2007
IEEE
168views Hardware» more  MICRO 2007»
14 years 4 months ago
Global Multi-Threaded Instruction Scheduling
Recently, the microprocessor industry has moved toward chip multiprocessor (CMP) designs as a means of utilizing the increasing transistor counts in the face of physical and micro...
Guilherme Ottoni, David I. August
SIGCOMM
2009
ACM
14 years 4 months ago
Optimizing the BSD routing system for parallel processing
The routing architecture of the original 4.4BSD [3] kernel has been deployed successfully without major design modification for over 15 years. In the unified routing architectur...
Qing Li, Kip Macy
ICDE
2007
IEEE
167views Database» more  ICDE 2007»
14 years 11 months ago
DSphere: A Source-Centric Approach to Crawling, Indexing and Searching the World Wide Web
We describe DSPHERE1 - a decentralized system for crawling, indexing, searching and ranking of documents in the World Wide Web. Unlike most of the existing search technologies tha...
Bhuvan Bamba, Ling Liu, James Caverlee, Vaibhav Pa...