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ARVLSI
1997
IEEE
104views VLSI» more  ARVLSI 1997»
14 years 3 months ago
A High-Speed Asynchronous Decompression Circuit for Embedded Processors
This paper describes the architecture and implementation of a high-speed decompression engine for embedded processors. The engine is targeted to processors where embedded programs...
Martin Benes, Andrew Wolfe, Steven M. Nowick
DAC
2010
ACM
14 years 2 months ago
Processor virtualization and split compilation for heterogeneous multicore embedded systems
Complex embedded systems have always been heterogeneous multicore systems. Because of the tight constraints on power, performance and cost, this situation is not likely to change a...
Albert Cohen, Erven Rohou
WSTFEUS
2003
IEEE
14 years 4 months ago
Error Resilient Video Transmission over Wireless Networks
— An error resilient architecture for video transmission over mobile wireless networks is presented. Radio link layer, transport layer, and application layer are combined to deal...
Gang Ding, Halima Ghafoor, Bharat K. Bhargava
DAC
1996
ACM
14 years 3 months ago
Opportunities and Obstacles in Low-Power System-Level CAD
A case study in low-power system-level design is presented. We detail the design of a low-power embedded system, a touchscreen interface device for a personal computer. This devic...
Andrew Wolfe
ICDCSW
2009
IEEE
14 years 5 months ago
Embedded Virtual Machines for Robust Wireless Control Systems
Embedded wireless networks have largely focused on openloop sensing and monitoring. To address actuation in closedloop wireless control systems there is a strong need to re-think ...
Rahul Mangharam, Miroslav Pajic