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RTAS
2006
IEEE
14 years 1 months ago
Bounding Preemption Delay within Data Cache Reference Patterns for Real-Time Tasks
Caches have become invaluable for higher-end architectures to hide, in part, the increasing gap between processor speed and memory access times. While the effect of caches on timi...
Harini Ramaprasad, Frank Mueller
ADBIS
2006
Springer
93views Database» more  ADBIS 2006»
14 years 1 months ago
An On-Line Reorganization Framework for SAN File Systems
While the cost per megabyte of magnetic disk storage is economical, organizations are alarmed by the increasing cost of managing storage. Storage Area Network (SAN) architectures ...
Shahram Ghandeharizadeh, Shan Gao, Chris Gahagan, ...
CODES
2005
IEEE
14 years 1 months ago
Aggregating processor free time for energy reduction
Even after carefully tuning the memory characteristics to the application properties and the processor speed, during the execution of real applications there are times when the pr...
Aviral Shrivastava, Eugene Earlie, Nikil D. Dutt, ...
ECRTS
2005
IEEE
14 years 1 months ago
Cache Contents Selection for Statically-Locked Instruction Caches: An Algorithm Comparison
Cache memories have been extensively used to bridge the gap between high speed processors and relatively slower main memories. However, they are sources of predictability problems...
Antonio Martí Campoy, Isabelle Puaut, Angel...
FCCM
2005
IEEE
132views VLSI» more  FCCM 2005»
14 years 1 months ago
Hardware Factorization Based on Elliptic Curve Method
The security of the most popular asymmetric cryptographic scheme RSA depends on the hardness of factoring large numbers. The best known method for factorization large integers is ...
Martin Simka, Jan Pelzl, Thorsten Kleinjung, Jens ...