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DAC
2006
ACM
14 years 9 months ago
Leakage power reduction of embedded memories on FPGAs through location assignment
Transistor leakage is poised to become the dominant source of power dissipation in digital systems, and reconfigurable devices are not immune to this problem. Modern FPGAs already...
Yan Meng, Timothy Sherwood, Ryan Kastner
RTAS
2006
IEEE
14 years 2 months ago
Impact of Upper Layer Adaptation on End-to-end Delay Management in Wireless Ad Hoc Networks
A good amount of research has been developed to support QoS issues in IEEE 802.11 ad hoc networks, such as QoS routing, MAC layer QoS support, and cross-layer QoS design. However,...
Wenbo He, Klara Nahrstedt
LCPC
2007
Springer
14 years 2 months ago
Revisiting SIMD Programming
Massively parallel SIMD array architectures are making their way into embedded processors. In these architectures, a number of identical processing elements having small private st...
Anton Lokhmotov, Benedict R. Gaster, Alan Mycroft,...
DAC
2005
ACM
14 years 9 months ago
Locality-conscious workload assignment for array-based computations in MPSOC architectures
While the past research discussed several advantages of multiprocessor-system-on-a-chip (MPSOC) architectures from both area utilization and design verification perspectives over ...
Feihui Li, Mahmut T. Kandemir
RTAS
1997
IEEE
14 years 20 days ago
Scalable Hardware Priority Queue Architectures for High-Speed Packet Switches
ÐWith effective packet-scheduling mechanisms, modern integrated networks can support the diverse quality-of-service requirements of emerging applications. However, arbitrating bet...
Sung-Whan Moon, Kang G. Shin, Jennifer Rexford