Sciweavers

1042 search results - page 30 / 209
» Embedded Systems Design: Optimization Challenges
Sort
View
DSD
2010
IEEE
161views Hardware» more  DSD 2010»
15 years 2 months ago
Design of Trace-Based Split Array Caches for Embedded Applications
—Since many embedded systems execute a predefined set of programs, tuning system components to application programs and data is the approach chosen by many design techniques to o...
Alice M. Tokarnia, Marina Tachibana
CODES
2008
IEEE
15 years 2 months ago
Methodology for multi-granularity embedded processor power model generation for an ESL design flow
With power becoming a major constraint for multi-processor embedded systems, it is becoming important for designers to characterize and model processor power dissipation. It is cr...
Young-Hwan Park, Sudeep Pasricha, Fadi J. Kurdahi,...
153
Voted
DAC
1999
ACM
16 years 3 months ago
Memory Exploration for Low Power, Embedded Systems
In embedded system design, the designer has to choose an onchip memory configuration that is suitable for a specific application. To aid in this design choice, we present a memory...
Wen-Tsong Shiue, Chaitali Chakrabarti
117
Voted
CF
2004
ACM
15 years 8 months ago
Opportunities and challenges in application-tuned circuits and architectures based on nanodevices
Nanoelectronics research has primarily focused on devices. By contrast, not much has been published on innovations at higher layers: we know little about how to construct circuits...
Teng Wang, Zhenghua Qi, Csaba Andras Moritz
111
Voted
CASES
2009
ACM
15 years 6 months ago
Exploiting residue number system for power-efficient digital signal processing in embedded processors
2's complement number system imposes a fundamental limitation on the power and performance of arithmetic circuits, due to the fundamental need of cross-datapath carry propaga...
Rooju Chokshi, Krzysztof S. Berezowski, Aviral Shr...