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» Embedded system synthesis under memory constraints
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VLSID
2007
IEEE
206views VLSI» more  VLSID 2007»
14 years 7 months ago
MAX: A Multi Objective Memory Architecture eXploration Framework for Embedded Systems-on-Chip
Today's feature-rich multimedia products require embedded system solution with complex System-on-Chip (SoC) to meet market expectations of high performance at a low cost and l...
T. S. Rajesh Kumar, C. P. Ravikumar, R. Govindaraj...
DSD
2010
IEEE
137views Hardware» more  DSD 2010»
13 years 5 months ago
A C-to-RTL Flow as an Energy Efficient Alternative to Embedded Processors in Digital Systems
We present a high-level synthesis flow for mapping an algorithm description (in C) to a provably equivalent registertransfer level (RTL) description of hardware. This flow uses an ...
Sameer D. Sahasrabuddhe, Sreenivas Subramanian, Ku...
EURODAC
1995
IEEE
202views VHDL» more  EURODAC 1995»
13 years 11 months ago
Hardware-software co-synthesis of fault-tolerant real-time distributed embedded systems
Distributed systems are becoming a popular way of implementing many embedded computing applications, automotive control being a common and important example. Such embedded systems...
Santhanam Srinivasan, Niraj K. Jha
IJCAI
1989
13 years 8 months ago
Platypus: A Constraint-Based Reasoning System
Platypus is a constraint-based reasoning engine for synthesis, diagnosis and other recognition tasks. While its target applications are similar to those of many rule-based expert ...
William S. Havens, Paul Stephen Rehfuss
IPPS
2007
IEEE
14 years 1 months ago
Rethinking Automated Synthesis of MPSoC Architectures
Emerging heterogeneous multiprocessors will have custom memory and bus architectures that must balance resource sharing and system partitioning to meet cost constraints. We propos...
Brett H. Meyer, Donald E. Thomas