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» Embedded system synthesis under memory constraints
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LCPC
2001
Springer
13 years 12 months ago
Bridging the Gap between Compilation and Synthesis in the DEFACTO System
Abstract. The DEFACTO project - a Design Environment For Adaptive Computing TechnOlogy - is a system that maps computations, expressed in high-level languages such as C, directly o...
Pedro C. Diniz, Mary W. Hall, Joonseok Park, Byoun...
ECRTS
2007
IEEE
14 years 1 months ago
Memory Resource Management for Real-Time Systems
Dynamic memory storage has been widely used for years in computer science. However, its use in real-time systems has not been considered as an important issue, and memory manageme...
Audrey Marchand, Patricia Balbastre, Ismael Ripoll...
ECRTS
2009
IEEE
13 years 5 months ago
Reader-Writer Synchronization for Shared-Memory Multiprocessor Real-Time Systems
Reader preference, writer preference, and task-fair readerwriter locks are shown to cause undue blocking in multiprocessor real-time systems. A new phase-fair reader-writer lock i...
Björn B. Brandenburg, James H. Anderson
DATE
2000
IEEE
139views Hardware» more  DATE 2000»
13 years 11 months ago
Target Architecture Oriented High-Level Synthesis for Multi-FPGA Based Emulation
This paper presents a new approach on combined highlevel synthesis and partitioning for FPGA-based multi-chip emulation systems. The goal is to synthesize a prototype with maximal...
Oliver Bringmann, Wolfgang Rosenstiel, Carsten Men...
VLSID
2008
IEEE
138views VLSI» more  VLSID 2008»
14 years 7 months ago
Memory Architecture Exploration Framework for Cache Based Embedded SOC
Today's feature-rich multimedia products require embedded system solution with complex System-on-Chip (SoC) to meet market expectations of high performance at a low cost and l...
T. S. Rajesh Kumar, C. P. Ravikumar, R. Govindaraj...