Sciweavers

432 search results - page 77 / 87
» Embedded system synthesis under memory constraints
Sort
View
SPIN
2000
Springer
14 years 1 months ago
The Temporal Rover and the ATG Rover
The Temporal Rover is a specification based verification tool for applications written in C, C++, Java, Verilog and VHDL. The tool combines formal specification, using Linear-Time ...
Doron Drusinsky
DCOSS
2010
Springer
14 years 2 months ago
Programming Sensor Networks Using Remora Component Model
Abstract. The success of high-level programming models in Wireless Sensor Networks (WSNs) is heavily dependent on factors such as ease of programming, code well-structuring, degree...
Amirhosein Taherkordi, Frédéric Loir...
SPAA
2003
ACM
14 years 3 months ago
The effect of communication costs in solid-state quantum computing architectures
Quantum computation has become an intriguing technology with which to attack difficult problems and to enhance system security. Quantum algorithms, however, have been analyzed un...
Dean Copsey, Mark Oskin, Tzvetan S. Metodi, Freder...
RTCSA
2003
IEEE
14 years 3 months ago
Real-Time Disk Scheduling with On-Disk Cache Conscious
Previous real-time disk scheduling algorithms assume that each disk request incurs a disk mechanical operation and only consider how to move the disk head under real-time constrain...
Hsung-Pin Chang, Ray-I Chang, Wei Kuan Shih, Ruei-...
ADHOCNOW
2009
Springer
14 years 4 months ago
SenSearch: GPS and Witness Assisted Tracking for Delay Tolerant Sensor Networks
Abstract— Mobile wireless sensor networks have to be robust against the limitations of the underlying platform. While lightweight form factor makes them an attractive choice for ...
Lun Jiang, Jyh-How Huang, Ankur Kamthe, Tao Liu, I...