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» Embedded system synthesis under memory constraints
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ISCA
2009
IEEE
158views Hardware» more  ISCA 2009»
14 years 2 months ago
Boosting single-thread performance in multi-core systems through fine-grain multi-threading
Industry has shifted towards multi-core designs as we have hit the memory and power walls. However, single thread performance remains of paramount importance since some applicatio...
Carlos Madriles, Pedro López, Josep M. Codi...
XIMEP
2004
ACM
108views Database» more  XIMEP 2004»
14 years 23 days ago
The Joy of SAX
Most current XQuery implementations require that all XML data reside in memory in one form or another before they start processing the data. This is unacceptable for large XML doc...
Leonidas Fegaras
CASES
2006
ACM
14 years 1 months ago
Adaptive object code compression
Previous object code compression schemes have employed static and semiadaptive compression algorithms to reduce the size of instruction memory in embedded systems. The suggestion ...
John Gilbert, David M. Abrahamson
COOPIS
2002
IEEE
14 years 10 days ago
Empirical Differences between COTS Middleware Scheduling Strategies
The proportion of complex distributed real-time embedded (DRE) systems made up of commercial-off-the-shelf (COTS) hardware and software is increasing significantly in response to...
Christopher D. Gill, Fred Kuhns, Douglas C. Schmid...
DAC
2003
ACM
14 years 8 months ago
An IDF-based trace transformation method for communication refinement
In the Artemis project [13], design space exploration of embedded systems is provided by modeling application behavior and architectural performance constraints separately. Mappin...
Andy D. Pimentel, Cagkan Erbas