Sciweavers

24 search results - page 3 / 5
» Embedding handcuffed designs with block size 2 or 3 in 4-cyc...
Sort
View
RTAS
2003
IEEE
14 years 22 days ago
Tool Set Implementation for Scenario-based Multithreading of UML-RT Models and Experimental Validation
This paper presents our tool set implementation for scenario-based multithreading of object-oriented realtime models and an accompanying experimental validation. Our tools enable ...
Jamison Masse, Saehwa Kim, Seongsoo Hong
FPGA
2007
ACM
150views FPGA» more  FPGA 2007»
14 years 1 months ago
FPGA-friendly code compression for horizontal microcoded custom IPs
Shrinking time-to-market and high demand for productivity has driven traditional hardware designers to use design methodologies that start from high-level languages. However, meet...
Bita Gorjiara, Daniel Gajski
FPL
2010
Springer
180views Hardware» more  FPL 2010»
13 years 5 months ago
A Karatsuba-Based Montgomery Multiplier
Abstract--Modular multiplication of long integers is an important building block for cryptographic algorithms. Although several FPGA accelerators have been proposed for large modul...
Gary Chun Tak Chow, Ken Eguro, Wayne Luk, Philip L...
EMSOFT
2010
Springer
13 years 5 months ago
Optimal WCET-aware code selection for scratchpad memory
We propose the first polynomial-time code selection algorithm for minimising the worst-case execution time of a nonnested loop executed on a fully pipelined processor that uses sc...
Hui Wu, Jingling Xue, Sridevan Parameswaran
LCTRTS
2010
Springer
14 years 2 months ago
Analysis and approximation for bank selection instruction minimization on partitioned memory architecture
A large number of embedded systems include 8-bit microcontrollers for their energy efficiency and low cost. Multi-bank memory architecture is commonly applied in 8-bit microcontr...
Minming Li, Chun Jason Xue, Tiantian Liu, Yingchao...