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DATE
1999
IEEE
162views Hardware» more  DATE 1999»
14 years 1 months ago
MOCSYN: Multiobjective Core-Based Single-Chip System Synthesis
In this paper, we present a system synthesis algorithm, called MOCSYN, which partitions and schedules embedded system specifications to intellectual property cores in an integrate...
Robert P. Dick, Niraj K. Jha
IPPS
1998
IEEE
14 years 1 months ago
Hyper Butterfly Network: A Scalable Optimally Fault Tolerant Architecture
Boundeddegreenetworks like deBruijn graphsor wrapped butterfly networks are very important from VLSI implementation point of view as well as for applications where the computing n...
Wei Shi, Pradip K. Srimani
ATVA
2004
Springer
138views Hardware» more  ATVA 2004»
14 years 25 days ago
Providing Automated Verification in HOL Using MDGs
While model checking suffers from the state space explosion problem, theorem proving is quite tedious and impractical for verifying complex designs. In this work, we present a veri...
Tarek Mhamdi, Sofiène Tahar
GECCO
2006
Springer
155views Optimization» more  GECCO 2006»
14 years 23 days ago
Comparison of genetic representation schemes for scheduling soft real-time parallel applications
This paper presents a hybrid technique that combines List Scheduling (LS) with Genetic Algorithms (GA) for constructing non-preemptive schedules for soft real-time parallel applic...
Yoginder S. Dandass, Amit C. Bugde
EKAW
2000
Springer
14 years 21 days ago
KIDS: An Iterative Algorithm to Organize Relational Knowledge
The goal of conceptual clustering is to build a set of embedded classes, which cluster objects based on their similarities. Knowledge organization aims at generating the set of mos...
Isabelle Bournaud, Mélanie Courtine, Jean-D...