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ISCAS
1995
IEEE
91views Hardware» more  ISCAS 1995»
15 years 8 months ago
An FPGA Based Reconfigurable Coprocessor Board Utilizing a Mathematics of Arrays
Abstract -- Work in progress at the University of Missouri-Rolla on hardware assists for high performance computing is presented. This research consists of a novel field programmab...
W. Eatherton, J. Kelly, T. Schiefelbein, H. Pottin...
DAC
1998
ACM
16 years 5 months ago
WELD - An Environment for Web-based Electronic Design
Increasing size and geographical separation of design data and teams has created a need for a network-based electronic design environment that is scaleable, adaptable, secure, hig...
Francis L. Chan, Mark D. Spiller, A. Richard Newto...
ESCIENCE
2007
IEEE
15 years 10 months ago
Building a Data Grid for the Australian Nanostructural Analysis Network
: This paper describes the architecture and services developed by the GRANI project for the Australian Nanostructural Analysis Network Organization (NANO). The aim of GRANI was to ...
Brendan Mauger, Jane Hunter, John Drennan, Ashley ...
156
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ICDT
2001
ACM
147views Database» more  ICDT 2001»
15 years 8 months ago
Parallelizing the Data Cube
This paper presents a general methodology for the efficient parallelization of existing data cube construction algorithms. We describe two different partitioning strategies, one f...
Frank K. H. A. Dehne, Todd Eavis, Susanne E. Hambr...
CACM
2011
125views more  CACM 2011»
14 years 11 months ago
Sora: high-performance software radio using general-purpose multi-core processors
This paper presents Sora, a fully programmable software radio platform on commodity PC architectures. Sora combines the performance and fidelity of hardware SDR platforms with th...
Kun Tan, He Liu, Jiansong Zhang, Yongguang Zhang, ...