395 search results - page 28 / 79 » Encoding Algorithms for Logic Synthesis |
132
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CADE
2010
Springer
15 years 3 months ago
2010
Springer
In order to support the verification of programs, verification tools such as ACL2 or Isabelle try to extract suitable induction axioms from the definitions of terminating, recursiv...
131
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DAC
2005
ACM
16 years 3 months ago
2005
ACM
: Due to exponential increase in subthreshold leakage with technology scaling and temperature increase, leakage power is becoming a major fraction of total power in the active mode...
143
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DATE
2009
IEEE
15 years 6 months ago
2009
IEEE
In the digital VLSI cycle, logic transformations are often required to modify the design to meet different synthesis and optimization goals. Logic transformations on sequential ci...
ICCAD
2005
IEEE
15 years 11 months ago
2005
IEEE
Clustering (or partitioning) is a crucial step between logic synthesis and physical design in the layout of a large scale design. A design verified at the logic synthesis level m...
95
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ICCAD
1992
IEEE
15 years 6 months ago
1992
IEEE
This paper presents a comprehensive timing model for behavioral-level specifications and algorithms for timing analysis in high-level synthesis. It is based on a timing network wh...