395 search results - page 30 / 79 » Encoding Algorithms for Logic Synthesis |
147
Voted
EON
2008
15 years 3 months ago
2008
We reuse here the framework, the setting, and the semantic modelling for the automated synthesis of the SWS Challenge Mediator presented in the companion paper [5], and show how to...
DAC
2005
ACM
16 years 3 months ago
2005
ACM
In this paper, we present a new linear-time retiming algorithm that produces near-optimal results. Our implementation is specifically targeted at Altera's Stratix [1] FPGAbas...
115
click to vote
VLSID
2007
IEEE
16 years 2 months ago
2007
IEEE
Boolean Satisfiability is seeing increasing use as a decision procedure in Electronic Design Automation (EDA) and other domains. Most applications encode their domain specific cons...
124
click to vote
DAC
2007
ACM
16 years 3 months ago
2007
ACM
Despite the impressive progress of logic synthesis in the past decade, finding the best architecture for a given circuit still remains an open problem and largely unsolved. In mos...
116
Voted
GLVLSI
2007
IEEE
15 years 8 months ago
2007
IEEE
This paper proposes a library-free technology mapping algorithm to reduce delay in combinational circuits. The algorithm reduces the overall number of series transistors through t...