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ISCA
1998
IEEE
151views Hardware» more  ISCA 1998»
13 years 11 months ago
Integrated Predicated and Speculative Execution in the IMPACT EPIC Architecture
Explicitly Parallel Instruction Computing (EPIC) architectures require the compiler to express program instruction level parallelism directly to the hardware. EPIC techniques whic...
David I. August, Daniel A. Connors, Scott A. Mahlk...
AISS
2010
165views more  AISS 2010»
13 years 5 months ago
Proposing a Comprehensive Storage Virtualization Architecture with Related Verification for Data Center Application
A successful IT Company is characterized by its ability to put the right information in front of the right decision-makers at the right time while concerns about security issues. ...
M. R. Aliabadi, Mohammad Reza Ahmadi
NOCS
2009
IEEE
14 years 2 months ago
Comparing tightly and loosely coupled mesochronous synchronizers in a NoC switch architecture
With the advent of Networks-on-Chip (NoCs), the interest for mesochronous synchronizers is again on the rise due to the intricacies of skew-controlled chip-wide clock tree distrib...
Daniele Ludovici, Alessandro Strano, Davide Bertoz...
ICCD
2004
IEEE
125views Hardware» more  ICCD 2004»
14 years 4 months ago
IPC Driven Dynamic Associative Cache Architecture for Low Energy
Existing schemes for cache energy optimization incorporate a limited degree of dynamic associativity: either direct mapped or full available associativity (say 4-way). In this pap...
Sriram Nadathur, Akhilesh Tyagi
JNCA
2000
117views more  JNCA 2000»
13 years 7 months ago
Distributed network storage service with quality-of-service guarantees
This paper envisions a distributed network storage service with Quality-ofService (QoS) guarantees, and describes its architecture and key mechanisms. When fully realized, this se...
John Chung-I Chuang, Marvin A. Sirbu