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FPL
2007
Springer
100views Hardware» more  FPL 2007»
14 years 1 months ago
Clock-Aware Placement for FPGAs
The programmable clock networks in FPGAs have a significant impact on overall power, area, and delay. Not only does the clock network itself dissipate a significant amount of powe...
Julien Lamoureux, Steven J. E. Wilton
SMA
2010
ACM
177views Solid Modeling» more  SMA 2010»
13 years 7 months ago
Multi-level grid algorithms for faster molecular energetics
Bio-molecules reach their stable configuration in solvent which is primarily water with a small concentration of salt ions. One approximation of the total free energy of a bio-mol...
Rezaul Alam Chowdhury, Chandrajit L. Bajaj
CAMP
2005
IEEE
14 years 1 months ago
Low Power Image Processing: Analog Versus Digital Comparison
— In this paper, a programmable analog retina is presented and compared with state of the art MPU for embedded imaging applications. The comparison is based on the energy require...
Jacques-Olivier Klein, Lionel Lacassagne, Herv&eac...
SENSYS
2010
ACM
13 years 5 months ago
eShare: a capacitor-driven energy storage and sharing network for long-term operation
The ability to move energy around makes it feasible to build distributed energy storage systems that can robustly extend the lifetime of networked sensor systems. eShare supports ...
Ting Zhu, Yu Gu, Tian He, Zhi-Li Zhang
DAC
2006
ACM
14 years 8 months ago
Charge recycling in MTCMOS circuits: concept and analysis
Designing an energy efficient power gating structure is an important and challenging task in Multi-Threshold CMOS (MTCMOS) circuit design. In order to achieve a very low power des...
Ehsan Pakbaznia, Farzan Fallah, Massoud Pedram