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CODES
2004
IEEE
13 years 11 months ago
A loop accelerator for low power embedded VLIW processors
The high transistor density afforded by modern VLSI processes have enabled the design of embedded processors that use clustered execution units to deliver high levels of performan...
Binu K. Mathew, Al Davis
ASYNC
2004
IEEE
102views Hardware» more  ASYNC 2004»
13 years 11 months ago
Non-Uniform Access Asynchronous Register Files
Register files of microprocessors have often been cited as performance bottlenecks and significant consumers of energy. The robust and modular nature of quasi-delay insensitive (Q...
David Fang, Rajit Manohar
PDP
2010
IEEE
13 years 11 months ago
Energy-Efficient Hardware Prefetching for CMPs Using Heterogeneous Interconnects
In the last years high performance processor designs have evolved toward Chip-Multiprocessor (CMP) architectures that implement multiple processing cores on a single die. As the nu...
Antonio Flores, Juan L. Aragón, Manuel E. A...
COMCOM
2004
119views more  COMCOM 2004»
13 years 7 months ago
Modeling TCP performance with proxies
Abstract-- This paper investigates the TCP dynamics and performance over proxies that shorten the TCP feedback loop by segmenting the end-to-end connection. Such proxies are often ...
Navid Ehsan, Mingyan Liu
LCTRTS
2009
Springer
14 years 2 months ago
Guaranteeing instruction fetch behavior with a lookahead instruction fetch engine (LIFE)
Instruction fetch behavior has been shown to be very regular and predictable, even for diverse application areas. In this work, we propose the Lookahead Instruction Fetch Engine (...
Stephen Roderick Hines, Yuval Peress, Peter Gavin,...