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HPCA
2005
IEEE
14 years 1 months ago
Microarchitectural Wire Management for Performance and Power in Partitioned Architectures
Future high-performance billion-transistor processors are likely to employ partitioned architectures to achieve high clock speeds, high parallelism, low design complexity, and low...
Rajeev Balasubramonian, Naveen Muralimanohar, Kart...
IPSN
2010
Springer
13 years 9 months ago
Adaptive IEEE 802.15.4 protocol for energy efficient, reliable and timely communications
The IEEE 802.15.4 standard for wireless sensor networks can support energy efficient, reliable, and timely packet transmission by tuning the medium access control parameters macMi...
Pan Gun Park, Carlo Fischione, Karl Henrik Johanss...
MICRO
2002
IEEE
124views Hardware» more  MICRO 2002»
14 years 18 days ago
Optimizing pipelines for power and performance
During the concept phase and definition of next generation high-end processors, power and performance will need to be weighted appropriately to deliver competitive cost/performan...
Viji Srinivasan, David Brooks, Michael Gschwind, P...
PARA
2004
Springer
14 years 1 months ago
Parallel Discrete Event Simulations of Grid-Based Models: Asynchronous Electromagnetic Hybrid Code
Abstract. The traditional technique to simulate physical systems modeled by partial differential equations is by means of a time-stepped methodology where the state of the system ...
Homa Karimabadi, Jonathan Driscoll, Jagrut Dave, Y...
MOBICOM
1997
ACM
13 years 11 months ago
Web Browsing in a Wireless Environment: Disconnected and Asynchronous Operation in ARTour Web Express
In a previous paper [elided], we described ARTour Web Express, a software system that makes it possible to run World Wide Web applications over wide-area wireless networks. Our ea...
Henry Chang, Carl D. Tait, Norman H. Cohen, Moshe ...