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ISCA
2005
IEEE
166views Hardware» more  ISCA 2005»
14 years 1 months ago
Increased Scalability and Power Efficiency by Using Multiple Speed Pipelines
One of the most important problems faced by microarchitecture designers is the poor scalability of some of the current solutions with increased clock frequencies and wider pipelin...
Emil Talpes, Diana Marculescu
IPPS
2010
IEEE
13 years 5 months ago
Performance modeling of heterogeneous systems
Predicting how well applications may run on modern systems is becoming increasingly challenging. It is no longer sufficient to look at number of floating point operations and commu...
Jan Christian Meyer, Anne C. Elster
SAC
2009
ACM
14 years 2 months ago
Impact of NVRAM write cache for file system metadata on I/O performance in embedded systems
File systems make use of part of DRAM as the buffer cache to enhance its performance in traditional systems. In this paper, we consider the use of Non-Volatile RAM (NVRAM) as a w...
In Hwan Doh, Hyo J. Lee, Young Je Moon, Eunsam Kim...
TC
2008
13 years 7 months ago
Implementing Synchronous Models on Loosely Time Triggered Architectures
Synchronous systems offer clean semantics and an easy verification path at the expense of often inefficient implementations. Capturing design specifications as synchronous models a...
Stavros Tripakis, Claudio Pinello, Albert Benvenis...
ESEC
1999
Springer
14 years 4 days ago
The CIP Method: Component- and Model-Based Construction of Embedded Systems
CIP is a model-based software development method for embedded systems. The problem of constructing an embedded system is decomposed into a functional and a connection problem. The ...
Hugo Fierz