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AUTOMATICA
2008
89views more  AUTOMATICA 2008»
13 years 7 months ago
Dynamic buffer management using optimal control of hybrid systems
This paper studies a general dynamic buffer management problem with one buffer inserted between two interacting components. The component to be controlled is assumed to have multi...
Wei Zhang, Jianghai Hu
ASPDAC
2008
ACM
94views Hardware» more  ASPDAC 2008»
13 years 9 months ago
Robust on-chip bus architecture synthesis for MPSoCs under random tasks arrival
A major trend in a modern system-on-chip design is a growing system complexity, which results in a sharp increase of communication traffic on the on-chip communication bus architec...
Sujan Pandey, Rolf Drechsler
HIPEAC
2009
Springer
14 years 2 months ago
Finding Stress Patterns in Microprocessor Workloads
Power consumption has emerged as a key design concern across the entire computing range, from low-end embedded systems to high-end supercomputers. Understanding the power character...
Frederik Vandeputte, Lieven Eeckhout
CODES
2005
IEEE
14 years 1 months ago
DVS for buffer-constrained architectures with predictable QoS-energy tradeoffs
We present a new scheme for dynamic voltage and frequency scaling (DVS) for processing multimedia streams on architectures with restricted buffer sizes. The main advantage of our ...
Alexander Maxiaguine, Samarjit Chakraborty, Lothar...