149 search results - page 5 / 30 » Energy exploration and reduction of SDRAM memory systems |
DAC
2006
ACM
14 years 8 months ago
2006
ACM
The increasing use of Multiprocessor Systems-on-Chip (MPSoCs) for high performance demands of embedded applications results in high power dissipation. The memory subsystem is a la...
ESTIMEDIA
2005
Springer
14 years 29 days ago
2005
Springer
Portable embedded systems require diligence in managing their energy consumption. Thus, power efficient processors coupled with onchip memories (e.g. caches, scratchpads) are the...
DAC
2009
ACM
14 years 8 months ago
2009
ACM
In this paper, we propose PDRAM, a novel energy efficient main memory architecture based on phase change random access memory (PRAM) and DRAM. The paper explores the challenges in...
DAC
2009
ACM
14 years 2 months ago
2009
ACM
In this paper, we propose PDRAM, a novel energy efficient main memory architecture based on phase change random access memory (PRAM) and DRAM. The paper explores the challenges i...
DATE
2002
IEEE
14 years 12 days ago
2002
IEEE
In programmable embedded systems, the memory subsystem represents a major cost, performance and power bottleneck. To optimize the system for such different goals, the designer wou...