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ISLPED
2003
ACM
85views Hardware» more  ISLPED 2003»
14 years 1 months ago
Energy recovery clocking scheme and flip-flops for ultra low-energy applications
A significant fraction of the total power in highly synchronous systems is dissipated over clock networks. Hence, low-power clocking schemes would be promising approaches for futu...
Matthew Cooke, Hamid Mahmoodi-Meimand, Kaushik Roy
ISCA
2005
IEEE
81views Hardware» more  ISCA 2005»
14 years 1 months ago
Energy Optimization of Subthreshold-Voltage Sensor Network Processors
Sensor network processors and their applications are a growing area of focus in computer system research and design. Inherent to this design space is a reduced processing performa...
Leyla Nazhandali, Bo Zhai, Javin Olson, Anna Reeve...
HOTOS
1999
IEEE
14 years 9 days ago
The Case for Higher-Level Power Management
Reducing the energy consumed in the use of computing devices is becoming a major design challenge. While the problem obviously must be addressed with improved low-level technology...
Carla Schlatter Ellis
ISLPED
2009
ACM
154views Hardware» more  ISLPED 2009»
14 years 21 days ago
Experimental analysis of sequence dependence on energy saving for error tolerant image processing
We present experimental analysis to exploit the sequence dependence on energy saving in error tolerant image processing. Our analysis shows that the error distributions depend not...
Se Hun Kim, Saibal Mukhopadhyay, Wayne Wolf
ICCD
2004
IEEE
103views Hardware» more  ICCD 2004»
14 years 5 months ago
Design-Space Exploration of Power-Aware On/Off Interconnection Networks
— With power a major limiting factor in the design of scalable interconnected systems, power-aware networks will become inherent components of single-chip and multi-chip systems....
Vassos Soteriou, Li-Shiuan Peh