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DCC
2008
IEEE
13 years 9 months ago
Design and Implementation of a High-Performance Microprocessor Cache Compression Algorithm
Researchers have proposed using hardware data compression units within the memory hierarchies of microprocessors in order to improve performance, energy efficiency, and functional...
Xi Chen, Lei Yang, Haris Lekatsas, Robert P. Dick,...
CSREAESA
2006
13 years 9 months ago
Piezoelectric-based Vibration Control in Composite Structures
ct This paper relates to vibration control using passive electrical shunt circuits. However, the vibration shunt control efficiency relies on the optimization of the vibration ener...
Jialong Cao, Sabu John, Tom Molyneaux
WSCG
2003
142views more  WSCG 2003»
13 years 9 months ago
Melting Objects
This paper describes a technique for producing realistic animations of melting objects. The work presented here introduces a method that accurately models both thermal flow and t...
Mark W. Jones
MICRO
2010
IEEE
149views Hardware» more  MICRO 2010»
13 years 5 months ago
ReMAP: A Reconfigurable Heterogeneous Multicore Architecture
This paper presents ReMAP, a reconfigurable architecture geared towards accelerating and parallelizing applications within a heterogeneous CMP. In ReMAP, threads share a common rec...
Matthew A. Watkins, David H. Albonesi
TVLSI
2010
13 years 2 months ago
C-Pack: A High-Performance Microprocessor Cache Compression Algorithm
Microprocessor designers have been torn between tight constraints on the amount of on-chip cache memory and the high latency of off-chip memory, such as dynamic random access memor...
Xi Chen, Lei Yang, Robert P. Dick, Li Shang, Haris...