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» Energy-aware error control coding for Flash memories
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TIT
2010
170views Education» more  TIT 2010»
13 years 5 months ago
Correcting charge-constrained errors in the rank-modulation scheme
We investigate error-correcting codes for a the rank-modulation scheme with an application to flash memory devices. In this scheme, a set of n cells stores information in the permu...
Anxiao Jiang, Moshe Schwartz, Jehoshua Bruck
SP
2003
IEEE
14 years 3 months ago
Using Memory Errors to Attack a Virtual Machine
We present an experimental study showing that soft memory errors can lead to serious security vulnerabilities in Java and .NET virtual machines, or in any system that relies on ty...
Sudhakar Govindavajhala, Andrew W. Appel
SP
2008
IEEE
14 years 4 months ago
Preventing Memory Error Exploits with WIT
Attacks often exploit memory errors to gain control over the execution of vulnerable programs. These attacks remain a serious problem despite previous research on techniques to pr...
Periklis Akritidis, Cristian Cadar, Costin Raiciu,...
ISCAS
2006
IEEE
100views Hardware» more  ISCAS 2006»
14 years 4 months ago
Decoders for low-density parity-check convolutional codes with large memory
— Low-density parity-check convolutional codes offer the same good error-correcting performance as low-density parity-check block codes while having the ability to encode and dec...
Stephen Bates, L. Gunthorpe, Ali Emre Pusane, Zhen...
ISCA
2012
IEEE
281views Hardware» more  ISCA 2012»
12 years 23 days ago
LOT-ECC: Localized and tiered reliability mechanisms for commodity memory systems
Memory system reliability is a serious and growing concern in modern servers. Existing chipkill-level memory protection mechanisms suffer from several drawbacks. They activate a l...
Aniruddha N. Udipi, Naveen Muralimanohar, Rajeev B...