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DAC
2003
ACM
14 years 2 months ago
Fast timing-driven partitioning-based placement for island style FPGAs
In this paper we propose a partitioning-based placement algorithm for FPGAs. The method incorporates simple, but effective heuristics that target delay minimization. The placement...
Pongstorn Maidee, Cristinel Ababei, Kia Bazargan
CSMR
2000
IEEE
14 years 1 months ago
Architectural Design Recovery using Data Mining Techniques
This paper presents a technique for recovering the high level design of legacy software systems according to user defined architectural plans. Architectural plans are represented...
Kamran Sartipi, Kostas Kontogiannis, Farhad Mavadd...
KBSE
2007
IEEE
14 years 3 months ago
Synthesis of test purpose directed reactive planning tester for nondeterministic systems
We describe a model-based construction of an online tester for black-box testing of implementation under test (IUT). The external behavior of the IUT is modeled as an output obser...
Jüri Vain, Kullo Raiend, Andres Kull, Juhan P...
ISPD
2004
ACM
146views Hardware» more  ISPD 2004»
14 years 2 months ago
Power-aware clock tree planning
Modern processors and SoCs require the adoption of poweroriented design styles, due to the implications that power consumption may have on reliability, cost and manufacturability ...
Monica Donno, Enrico Macii, Luca Mazzoni
TREC
2007
13 years 10 months ago
Dartmouth College at TREC 2007 Legal Track
This report describes Dartmouth College’s approach and results for the 2007 TREC Legal Track. Our original plan was to use the Combination of Expert Opinion (CEO) algorithm [1],...
Wei-Ming Chen, Paul Thompson