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» Enhanced clustered voltage scaling for low power
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ISLPED
2009
ACM
168views Hardware» more  ISLPED 2009»
14 years 2 months ago
Low power circuit design based on heterojunction tunneling transistors (HETTs)
The theoretical lower limit of subthreshold swing in MOSFETs (60 mV/decade) significantly restricts low voltage operation since it results in a low ON to OFF current ratio at low ...
Daeyeon Kim, Yoonmyung Lee, Jin Cai, Isaac Lauer, ...
DATE
2009
IEEE
131views Hardware» more  DATE 2009»
14 years 2 months ago
Process Variation Aware SRAM/Cache for aggressive voltage-frequency scaling
this paper proposes a novel Process Variation Aware SRAM architecture designed to inherently support voltage scaling. The peripheral circuitry of the SRAM is modified to selectivel...
Avesta Sasan, Houman Homayoun, Ahmed M. Eltawil, F...
RTAS
2005
IEEE
14 years 1 months ago
Practical On-line DVS Scheduling for Fixed-Priority Real-Time Systems
We present an on-line Dynamic Voltage Scaling (DVS) algorithm for preemptive fixed-priority real-time systems called low power Limited Demand Analysis with Transition overhead (l...
Bren Mochocki, Xiaobo Sharon Hu, Gang Quan
ICCD
2004
IEEE
100views Hardware» more  ICCD 2004»
14 years 4 months ago
Thermal-Aware Clustered Microarchitectures
As frequencies and feature size scale faster than operating voltages, power density is increasing in each processor generation. Power density and the cost of removing the heat it ...
Pedro Chaparro, José González, Anton...
ISLPED
2004
ACM
124views Hardware» more  ISLPED 2004»
14 years 27 days ago
Application adaptive energy efficient clustered architectures
As clock frequency and die area increase, achieving energy efficiency, while distributing a low skew, global clock signal becomes increasingly difficult. Challenges imposed by dee...
Diana Marculescu