146 search results - page 22 / 30 » Enhanced clustered voltage scaling for low power |
ISLPED
2009
ACM
14 years 4 days ago
2009
ACM
We investigate techniques to design 45nm minimum-energy subthreshold CMOS circuits under timing constraints, considering the practical case of an 8-bit multiplier. We first show ...
CCGRID
2010
IEEE
13 years 8 months ago
2010
IEEE
Abstract--Reducing energy consumption for high end computing can bring various benefits such as, reduce operating costs, increase system reliability, and environment respect. This ...
JSAC
2008
13 years 7 months ago
2008
We consider the downlink of a wireless system with an M-antenna base station and K single-antenna users. A limited feedback-based scheduling and precoding scenario is considered th...
CASES
2007
ACM
2007
ACM
INTACTE: an interconnect area, delay, and energy estimation tool for microarchitectural explorations
13 years 11 months ago
Prior work on modeling interconnects has focused on optimizing the wire and repeater design for trading off energy and delay, and is largely based on low level circuit parameters....
CODES
2009
IEEE
13 years 8 months ago
2009
IEEE
We present a novel loop transformation technique, particularly well suited for optimizing embedded compilers, where an increase in compilation time is acceptable in exchange for s...