56 search results - page 7 / 12 » Enhancing test efficiency for delay fault testing using mult... |
ICIP
2010
IEEE
13 years 5 months ago
2010
IEEE
Feature selection is an important issue for object detection. In this paper, we propose an effective wrapper-based feature selection scheme using Binary Particle Swarm Optimizatio...
DAC
2006
ACM
13 years 9 months ago
2006
ACM
Software-based self-test (SBST) has recently emerged as an effective methodology for the manufacturing test of processors and other components in systems-on-chip (SoCs). By moving ...
TVLSI
2002
13 years 7 months ago
2002
Circular built-in self-test (BIST) is a "test per clock" scheme that offers many advantages compared with conventional BIST approaches in terms of low area overhead, simp...
UIST
2000
ACM
14 years 2 days ago
2000
ACM
We describe a simple technique for accurately calibrating the temporal lag in augmented and virtual environments within the Enhanced Virtual Hand Lab (EVHL), a collection of hardw...
ITC
1997
IEEE
13 years 12 months ago
1997
IEEE
In a fundamental paradigm shift in system design, entire systems are being built on a single chip, using multiple embedded cores. Though the newest system design methodology has s...