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» Environment Assumptions for Synthesis
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ASE
2005
103views more  ASE 2005»
13 years 7 months ago
Component Verification with Automatically Generated Assumptions
Abstract. Model checking is an automated technique that can be used to determine whether a system satisfies certain required properties. The typical approach to verifying propertie...
Dimitra Giannakopoulou, Corina S. Pasareanu, Howar...
JSS
2006
99views more  JSS 2006»
13 years 7 months ago
Automatic generation of assumptions for modular verification of software specifications
Model checking is a powerful automated technique mainly used for the verification of properties of reactive systems. In practice, model checkers are limited due to the state explos...
Claudio de la Riva, Javier Tuya
DAC
1999
ACM
14 years 8 months ago
CAD Directions for High Performance Asynchronous Circuits
This paper describes a novel methodology for high performance asynchronous design based on timed circuits and on CAD support for their synthesis using Relative Timing. This method...
Ken S. Stevens, Shai Rotem, Steven M. Burns, Jordi...
ECBS
2000
IEEE
99views Hardware» more  ECBS 2000»
14 years 16 hour ago
Enhancing Architectural Mismatch Detection with Assumptions
Detecting software architecture inconsistencies is a critical issue in software design. Software systems are described in terms of components, component behavior and interaction a...
Sebastián Uchitel, Daniel Yankelevich
DATE
2009
IEEE
115views Hardware» more  DATE 2009»
13 years 11 months ago
Customizing IP cores for system-on-chip designs using extensive external don't-cares
Traditional digital circuit synthesis flows start from an HDL behavioral definition and assume that circuit functions are almost completely defined, making don't-care conditio...
Kai-Hui Chang, Valeria Bertacco, Igor L. Markov