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DATE
2000
IEEE
94views Hardware» more  DATE 2000»
14 years 1 days ago
Shared Memory Implementations of Synchronous Dataflow Specifications
There has been a proliferation of block-diagram environments for specifying and prototyping DSP systems. These include tools from academia like Ptolemy [3], and GRAPE [7], and com...
Praveen K. Murthy, Shuvra S. Bhattacharyya
EMSOFT
2006
Springer
13 years 11 months ago
Real-time interfaces for composing real-time systems
Recently, a number of frameworks were proposed to extend interface theory to the domains of single-processor and distributed real-time systems. This paper unifies some of these ap...
Lothar Thiele, Ernesto Wandeler, Nikolay Stoimenov
EURODAC
1994
IEEE
123views VHDL» more  EURODAC 1994»
13 years 11 months ago
Testing redundant asynchronous circuits by variable phase splitting
An approach for stuck-at-i and delay-fault testing of redundant circuits without modifying the logic is proposed. The only requirement is the ability to control both phases of eac...
Luciano Lavagno, Antonio Lioy, Michael Kishinevsky
CAV
2007
Springer
113views Hardware» more  CAV 2007»
14 years 1 months ago
On Synthesizing Controllers from Bounded-Response Properties
In this paper we propose a complete chain for synthesizing controllers from high-level specifications. From real-time properties expressed in the logic MTL we generate, under boun...
Oded Maler, Dejan Nickovic, Amir Pnueli
ICCAD
1994
IEEE
137views Hardware» more  ICCAD 1994»
13 years 11 months ago
Dynamic scheduling and synchronization synthesis of concurrent digital systems under system-level constraints
We present in this paper a novel control synthesis technique for system-level specifications that are better described as a set of concurrent synchronous descriptions, their synch...
Claudionor José Nunes Coelho Jr., Giovanni ...