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» Error Detection Using BMC in a Parallel Environment
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HPCA
2006
IEEE
14 years 7 months ago
BulletProof: a defect-tolerant CMP switch architecture
As silicon technologies move into the nanometer regime, transistor reliability is expected to wane as devices become subject to extreme process variation, particle-induced transie...
Kypros Constantinides, Stephen Plaza, Jason A. Blo...
COSIT
2001
Springer
142views GIS» more  COSIT 2001»
13 years 11 months ago
The Utility of Global Representations in a Cognitive Map
In this paper we propose the use of small global memory for a viewer’s immediate surroundings to assist in recognising places that have been visited previously. We call this glob...
Margaret E. Jefferies, Wai K. Yeap
FPGA
2006
ACM
195views FPGA» more  FPGA 2006»
13 years 10 months ago
An adaptive Reed-Solomon errors-and-erasures decoder
The development of Reed-Solomon (RS) codes has allowed for improved data transmission over a variety of communication media. Although Reed-Solomon decoding provides a powerful def...
Lilian Atieno, Jonathan Allen, Dennis Goeckel, Rus...
QEST
2009
IEEE
14 years 1 months ago
Recent Extensions to Traviando
—Traviando is a trace analyzer and visualizer for simulation traces of discrete event dynamic systems. In this paper, we briefly outline recent extensions of Traviando towards a...
Peter Kemper
FUIN
2007
130views more  FUIN 2007»
13 years 7 months ago
A Logic-Based Approach to Finding Explanations for Discrepancies in Optimistic Plan Execution
Abstract. Consider an agent executing a plan with nondeterministic actions, in a dynamic environment, which might fail. Suppose that she is given a description of this action domai...
Thomas Eiter, Esra Erdem, Wolfgang Faber, Já...