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» Error Modeling in Dependable Component-Based Systems
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DSD
2004
IEEE
136views Hardware» more  DSD 2004»
13 years 11 months ago
FPGA Based Design of the Railway's Interlocking Equipments
This paper describes the architecture of a safety system of the railway's interlocking equipment, which has been developed for Czech railways. The system will be used for the...
Radek Dobias, Hana Kubatova
CORR
2010
Springer
95views Education» more  CORR 2010»
13 years 8 months ago
Performance evaluation for ML sequence detection in ISI channels with Gauss Markov Noise
Inter-symbol interference (ISI) channels with data dependent Gauss Markov noise have been used to model read channels in magnetic recording and other data storage systems. The Vite...
Naveen Kumar, Aditya Ramamoorthy, Murti V. Salapak...
SCESM
2006
ACM
238views Algorithms» more  SCESM 2006»
14 years 1 months ago
Nobody's perfect: interactive synthesis from parametrized real-time scenarios
As technical systems keep growing more complex and sophisticated, designing software for the safety-critical coordination between their components becomes increasingly difficult....
Holger Giese, Stefan Henkler, Martin Hirsch, Flori...
ICASSP
2011
IEEE
12 years 11 months ago
Sentence simplification for spoken language understanding
In this paper, we present a sentence simplification method and demonstrate its use to improve intent determination and slot filling tasks in spoken language understanding (SLU) ...
Gökhan Tür, Dilek Hakkani-Tür, Larr...
IEEEPACT
2009
IEEE
13 years 5 months ago
ITCA: Inter-task Conflict-Aware CPU Accounting for CMPs
Abstract--Chip-MultiProcessor (CMP) architectures are becoming more and more popular as an alternative to the traditional processors that only extract instruction-level parallelism...
Carlos Luque, Miquel Moretó, Francisco J. C...