Sciweavers

122 search results - page 22 / 25
» Error tolerant associative memory
Sort
View
CHI
2001
ACM
14 years 8 months ago
Ignoring perfect knowledge in-the-world for imperfect knowledge in-the-head
Constraints and dependencies among the elements of embodied cognition form patterns or microstrategies of interactive behavior. Hard constraints determine which microstrategies ar...
Wayne D. Gray, Wai-Tat Fu
COGSCI
2004
81views more  COGSCI 2004»
13 years 7 months ago
Soft constraints in interactive behavior: the case of ignoring perfect knowledge in-the-world for imperfect knowledge in-the-hea
Constraints and dependencies among the elements of embodied cognition form patterns or microstrategies of interactive behavior. Hard constraints determine which microstrategies ar...
Wayne D. Gray, Wai-Tat Fu
EDCC
2008
Springer
13 years 9 months ago
A Transient-Resilient System-on-a-Chip Architecture with Support for On-Chip and Off-Chip TMR
The ongoing technological advances in the semiconductor industry make Multi-Processor System-on-a-Chips (MPSoCs) more attractive, because uniprocessor solutions do not scale satis...
Roman Obermaisser, Hubert Kraut, Christian El Sall...
DSN
2011
IEEE
12 years 7 months ago
Transparent dynamic binding with fault-tolerant cache coherence protocol for chip multiprocessors
—Aggressive technology scaling causes chip multiprocessors increasingly error-prone. Core-level faulttolerant approaches bind two cores to implement redundant execution and error...
Shuchang Shan, Yu Hu, Xiaowei Li
JCB
1998
129views more  JCB 1998»
13 years 7 months ago
A Sticker-Based Model for DNA Computation
We introduce a new model of molecular computation that we call the sticker model. Like many previous proposals it makes use of DNA strands as the physical substrate in which infor...
Sam T. Roweis, Erik Winfree, Richard Burgoyne, Nic...