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ECCV
2000
Springer
14 years 9 months ago
Diffeomorphic Matching Problems in One Dimension: Designing and Minimizing Matching Functionals
This paper focuses on matching 1D structures by variational methods. We provide rigorous rules for the construction of the cost function, on the basis of an analysis of properties ...
Alain Trouvé, Laurent Younes
GLVLSI
2007
IEEE
167views VLSI» more  GLVLSI 2007»
14 years 1 months ago
A new approach to logic synthesis of multi-output boolean functions on pal-based CPLDS
A PAL-based logic block is the core of great majority of contemporary CPLD devices. The purpose of the paper is to present a new approach to multi-level synthesis for PAL-based CP...
Dariusz Kania
VLSID
2006
IEEE
130views VLSI» more  VLSID 2006»
14 years 7 months ago
A New Approach to Synthesize Multiple-Output Functions Using Reversible Programmable Logic Array
In this paper, a new realization for logic functions, namely Reversible Programmable Logic Array (RPLA), has been proposed. The proposed realization has the advantage of regularit...
Ahsan Raja Chowdhury, Rumana Nazmul, Hafiz Md. Has...
DAC
1996
ACM
13 years 11 months ago
Espresso-HF: A Heuristic Hazard-Free Minimizer for Two-Level Logic
-- We present a new heuristic algorithm for hazard-free minimization of two-level logic. On nearly all examples, the algorithm finds an exactly minimum-cost cover. It also solves s...
Michael Theobald, Steven M. Nowick, Tao Wu
CDES
2008
87views Hardware» more  CDES 2008»
13 years 9 months ago
Finding Minimal ESCT Expressions for Boolean Functions with Weight of up to 7
In this paper an algorithm is proposed for the synthesis and exact minimization of ESCT (Exclusive or Sum of Complex Terms) expressions for Boolean functions of up to seven comple...
Dimitrios Voudouris, Marinos Sampson, George K. Pa...