710 search results - page 31 / 142 » Estimating design time for system circuits |
175
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ICIP
1998
IEEE
16 years 7 months ago
1998
IEEE
Optical flow estimation from image sequences has been for several years a mathematical process carried out by general purpose processors in no real time. In this work a specific a...
135
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ICCAD
2004
IEEE
16 years 2 months ago
2004
IEEE
This paper presents the Routing Cost Valleys (RCV) algorithm – the first published algorithm that simultaneously optimizes all short- and long-path timing constraints in a Field...
157
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Publication
With the technology moving into the deep sub-100nm region, the increase of leakage power consumption necessitates more aggressive power reduction techniques. Power gating is a prom...
152
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DATE
2000
IEEE
15 years 10 months ago
2000
IEEE
In this paper, we introduce a discrete-time model for the complete power supply sub-system that closely approximates the behavior of its circuit-level (i.e., HSpice), continuous-t...
168
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EURODAC
1994
IEEE
15 years 10 months ago
1994
IEEE
In performance-driven interconnect design, delay estimators are used to determine both the topology and the layout of good routing trees. We address the class of moment-matching, ...