220 search results - page 1 / 44 » Estimating functional coverage in bounded model checking |
DATE
2007
IEEE
14 years 5 months ago
2007
IEEE
Formal verification is an important issue in circuit and system design. In this context, Bounded Model Checking (BMC) is one of the most successful techniques. But even if all sp...
ISVLSI
2007
IEEE
14 years 5 months ago
2007
IEEE
Formal verification has become an important step in circuit and system design. A prominent technique is Bounded Model Checking (BMC) which is widely used in industry. In BMC it i...
GLVLSI
1999
IEEE
14 years 3 months ago
1999
IEEE
This paper proposes a new fault coverage estimation model which can be used in the early stage of VLSI design. The fault coverage model is an exponentially decaying function with ...
ASPDAC
2006
ACM
14 years 4 months ago
2006
ACM
— Lack of complete formal specification is one of the major obstacles for the deployment of model checking. Coverage estimation addresses this issue by revealing the unverified...
INFOCOM
2009
IEEE
14 years 5 months ago
2009
IEEE
—Tracking of movements such as that of people, animals, vehicles, or of phenomena such as fire, can be achieved by deploying a wireless sensor network. So far only prototype sys...