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DAC
2012
ACM
11 years 10 months ago
A metric for layout-friendly microarchitecture optimization in high-level synthesis
In this work we address the problem of managing interconnect timing in high-level synthesis by generating a layoutfriendly microarchitecture. A metric called spreading score is pr...
Jason Cong, Bin Liu
ISCAS
2005
IEEE
123views Hardware» more  ISCAS 2005»
14 years 1 months ago
Lower-bound estimation for multi-bitwidth scheduling
In high-level synthesis, accurate lower-bound estimation is helpful to explore the search space efficiently and to evaluate the quality of heuristic algorithms. For the lower-bound...
Junjuan Xu, Jason Cong, Xu Cheng
EUC
2006
Springer
13 years 11 months ago
On Multiprocessor Utility Accrual Real-Time Scheduling with Statistical Timing Assurances
We present the first Utility Accrual (or UA) real-time scheduling algorithm for multiprocessors, called gMUA. The algorithm considers an application model where real-time activiti...
Hyeonjoong Cho, Haisang Wu, Binoy Ravindran, E. Do...
INFOCOM
2008
IEEE
14 years 2 months ago
Understanding the Capacity Region of the Greedy Maximal Scheduling Algorithm in Multi-Hop Wireless Networks
In this paper, we characterize the performance of an important class of scheduling schemes, called Greedy Maximal Scheduling (GMS), for multi-hop wireless networks. While a lower ...
Changhee Joo, Xiaojun Lin, Ness B. Shroff
FOCS
2007
IEEE
14 years 2 months ago
Adaptive Simulated Annealing: A Near-optimal Connection between Sampling and Counting
We present a near-optimal reduction from approximately counting the cardinality of a discrete set to approximately sampling elements of the set. An important application of our wo...
Daniel Stefankovic, Santosh Vempala, Eric Vigoda