Sciweavers

501 search results - page 37 / 101
» Evaluating CMPs and Their Memory Architecture
Sort
View
TPDS
2008
89views more  TPDS 2008»
13 years 7 months ago
Power/Performance/Thermal Design-Space Exploration for Multicore Architectures
Multicore architectures have been ruling the recent microprocessor design trend. This is due to different reasons: better performance, thread-level parallelism bounds in modern app...
Matteo Monchiero, Ramon Canal, Antonio Gonzá...
SIGMETRICS
2010
ACM
213views Hardware» more  SIGMETRICS 2010»
14 years 15 days ago
Small subset queries and bloom filters using ternary associative memories, with applications
Associative memories offer high levels of parallelism in matching a query against stored entries. We design and analyze an architecture which uses a single lookup into a Ternary C...
Ashish Goel, Pankaj Gupta
SC
2000
ACM
14 years 1 days ago
Performance of Hybrid Message-Passing and Shared-Memory Parallelism for Discrete Element Modeling
The current trend in HPC hardware is towards clusters of shared-memory (SMP) compute nodes. For applications developers the major question is how best to program these SMP cluster...
D. S. Henty
CSE
2009
IEEE
13 years 11 months ago
A Comparative Study of Blocking Storage Methods for Sparse Matrices on Multicore Architectures
Sparse Matrix-Vector multiplication (SpMV) is a very challenging computational kernel, since its performance depends greatly on both the input matrix and the underlying architectur...
Vasileios Karakasis, Georgios I. Goumas, Nectarios...
DATE
2009
IEEE
155views Hardware» more  DATE 2009»
14 years 2 months ago
Using non-volatile memory to save energy in servers
Abstract—Recent breakthroughs in circuit and process technology have enabled new usage models for non-volatile memory technologies such as Flash and phase change RAM (PCRAM) in t...
David Roberts, Taeho Kgil, Trevor N. Mudge