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VLSID
2008
IEEE
166views VLSI» more  VLSID 2008»
14 years 8 months ago
Exploring the Processor and ISA Design for Wireless Sensor Network Applications
Power consumption, physical size, and architecture design of sensor node processors have been the focus of sensor network research in the architecture community. What lies at the ...
Shashidhar Mysore, Banit Agrawal, Frederic T. Chon...
VLSID
2005
IEEE
147views VLSI» more  VLSID 2005»
14 years 8 months ago
Memory-Centric Motion Estimator
In the streaming video processing domain, the only way to meet strict performance and quality requirements and yet to provide the area- and power-wise optimal platform is to apply...
Aleksandar Beric, Ramanathan Sethuraman, Jef L. va...
DAC
2002
ACM
14 years 8 months ago
Software synthesis from synchronous specifications using logic simulation techniques
This paper addresses the problem of automatic generation of implementation software from high-level functional specifications in the context of embedded system on chip designs. So...
Yunjian Jiang, Robert K. Brayton
WSC
2004
13 years 9 months ago
Implementing the High Level Architecture in the Virtual Test Bed
The Virtual Test Bed (VTB) is a prototype of a virtual engineering environment to study operations of current and future space vehicles, spaceports, and ranges. The HighLevel Arch...
José A. Sepúlveda, Luis C. Rabelo, J...
JMS
2010
109views more  JMS 2010»
13 years 2 months ago
Newborn Screening Healthcare Information System Based on Service-Oriented Architecture
In this paper, we established a newborn screening system under the HL7/Web Services frameworks. We rebuilt the NTUH Newborn Screening Laboratory's original standalone architec...
Sung-huai Hsieh, Sheau-Ling Hsieh, Yin-Hsiu Chien,...