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» Evaluating Hardware Compilation Techniques
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MICRO
2009
IEEE
326views Hardware» more  MICRO 2009»
15 years 11 months ago
DDT: design and evaluation of a dynamic program analysis for optimizing data structure usage
Data structures define how values being computed are stored and accessed within programs. By recognizing what data structures are being used in an application, tools can make app...
Changhee Jung, Nathan Clark
ISPD
2003
ACM
110views Hardware» more  ISPD 2003»
15 years 9 months ago
Explicit gate delay model for timing evaluation
Delay evaluation is always a crucial concern in the VLSI design and it becomes increasingly more critical in the nowadays deep-submicron technology. To obtain an accurate delay va...
Muzhou Shao, Martin D. F. Wong, Huijing Cao, Youxi...
ISPASS
2010
IEEE
15 years 11 months ago
Runahead execution vs. conventional data prefetching in the IBM POWER6 microprocessor
After many years of prefetching research, most commercially available systems support only two types of prefetching: software-directed prefetching and hardware-based prefetchers u...
Harold W. Cain, Priya Nagpurkar
PLDI
1998
ACM
15 years 8 months ago
Exploiting Idle Floating-Point Resources for Integer Execution
In conventional superscalar microarchitectures with partitioned integer and floating-point resources, all floating-point resources are idle during execution of integer programs....
S. Subramanya Sastry, Subbarao Palacharla, James E...
158
Voted
CACM
2011
96views more  CACM 2011»
14 years 11 months ago
Why STM can be more than a research toy
Software Transactional Memory (STM) promises to simplify concurrent programming without requiring specific hardware support. Yet, STM’s credibility lies on the extent to which ...
Aleksandar Dragojevic, Pascal Felber, Vincent Gram...