1304 search results - page 15 / 261 » Evaluating Hardware Compilation Techniques |
ICECCS
1996
IEEE
13 years 12 months ago
1996
IEEE
Compiler optimization techniques have been applied to facilitate development and performance tuning of non-real-time systems. Unfortunately, regular compiler optimization can comp...
ENTCS
2006
13 years 7 months ago
2006
Executing concurrent specifications on sequential hardware is important for both simulation of systems that are eventually implemented on concurrent hardware and for those most co...
ICS
2004
Tsinghua U.
14 years 1 months ago
2004
Tsinghua U.
The Cray X1 was recently introduced as the first in a new line of parallel systems to combine high-bandwidth vector processing with an MPP system architecture. Alongside capabili...
ASPLOS
1992
ACM
13 years 11 months ago
1992
ACM
Software-controlled data prefetching is a promising technique for improving the performance of the memory subsystem to match today's high-performance processors. While prefet...
MICRO
2007
IEEE
14 years 1 months ago
2007
IEEE
As silicon process technology scales deeper into the nanometer regime, hardware defects are becoming more common. Such defects are bound to hinder the correct operation of future ...