1304 search results - page 19 / 261 » Evaluating Hardware Compilation Techniques |
COMPSAC
2005
IEEE
14 years 1 months ago
2005
IEEE
The use of several distinct recovery procedures is one of the techniques that can be used to ensure high availability and fault-tolerance of computer systems. This method has been...
IPPS
2002
IEEE
14 years 19 days ago
2002
IEEE
The size and complexity of current custom VLSI have forced the use of high-level programming languages to describe hardware, and compiler and synthesis technology bstract designs ...
DATE
2008
IEEE
14 years 2 months ago
2008
IEEE
Fetching instructions from a set-associative cache in an embedded processor can consume a large amount of energy due to the tag checks performed. Recent proposals to address this ...
ICS
1999
Tsinghua U.
13 years 12 months ago
1999
Tsinghua U.
As the gap between memory and processor speeds continues to widen, cache efficiency is an increasingly important component of processor performance. Compiler techniques have been...
HOTOS
1999
IEEE
14 years 9 min ago
1999
IEEE
Several operating systems projects revolve around moving functionality above or below the kernel "red line" to increase flexibility or performance. We describe how a gen...